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Academic Year/course: 2017/18

532 - Master's in Industrial Engineering

60837 - FPGA-Based Digital Control for Power Converters


Syllabus Information

Academic Year:
2017/18
Subject:
60837 - FPGA-Based Digital Control for Power Converters
Faculty / School:
110 - Escuela de Ingeniería y Arquitectura
Degree:
532 - Master's in Industrial Engineering
ECTS:
6.0
Year:
2
Semester:
First semester
Subject Type:
Optional
Module:
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4.1. Assessment tasks (description of tasks, marking system and assessment criteria)

Course grading
The final grade for this course is based on the following weighting:
- Final exam (50 % of grade)
- Pre-lab work, attendance, attitude, and accomplishment during laboratory sessions (30 %)
- Laboratory reports (20 %)

5.1. Methodological overview

The methodology followed in this course is oriented towards achievement of the learning objectives. A wide range of teaching and learning tasks are implemented, such as

  • Lectures, where the theoretical concepts of the design of FPGA-based digital electronic systems for power electronic applications will be presented, illustrated with numerous examples.
  • Several sessions will be devoted to apply the theoretical concepts to solve problems and case studies.
  • Laboratory sessions will be conducted in small groups where students simulate, program and check the operation of the FPGA-based digital electronic systems.

5.2. Learning tasks

The course includes the following learning tasks:

  • Lectures. 2 weekly hours.
  • Practice sessions. 1 weekly hour.
  • Laboratory sessions (15 hours). 5 sessions of 3 hours each. Students will work and prepare lab reports in pairs or small groups. 
  • Moodle will be used to communicate announcements and to submit laboratory reports.

5.3. Syllabus

The course will address the following topics:

Lectures

  • T0. Introduction.
  • T1. Design with FPGA for switched-mode power electronic converters.
  • T2. Arithmetic and VHDL coding.
  • T3. VHDL modeling of switched-mode power converters for test bench generation.
  • T4. FPGA-based gate signal generation for power electronic converters.
  • T5. VHDL description of digital controllers for power electronic converters.

Laboratory sessions

  • P1. FPGA interface with an A / D converter. Simulation + hands-on.
  • P2. VHDL Modeling of a Buck converter. Simulation.
  • P3. FPGA-Based Sigma-delta modulator. Simulation + hands-on.
  • P4. Digital Control of a Buck Converter I. Simulation.
  • P5. Digital Control of a Buck Converter II. Simulation + hands-on.

5.4. Course planning and calendar

Further information concerning the timetable, classroom, office hours, assessment dates and other details regarding this course, will be provided on the first day of class or please refer to the EINA website.

5.5. Bibliography and recommended resources

[BB: Basic Bibliography / BC: Complementary Bibliography]

  • [BB] Electrónica digital : aplicaciones y problemas con VHDL / José Ignacio Artigas Maestre, Luis Ángel Barragán Pérez, Carlos Orrite Uruñuela, Isidro Urriza Parroqué: Prentice Hall, Madrid, 2002.
  • [BC] Corradin, L. Digital Control of High-Frequency Switched-Mode Power Converters / L. Corradin, D. Maksimovic, P. Mattavelli, R. Zane (IEEE Press Series on Power Engineering) Wiley, 2015.
  • [BC] Meyer-Baese, U. Digital Signal Processing with Field Programmable Gate Arrays / U. Meyer-Baese. Springer, 2007